Silicon carbide field effect transistor with increased avalanche

Details Silicon carbide field effect transistor with increased avalanche Silicon carbide field effect transistor with increased avalanche

1998-04-09

1999-10-05

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438273, 438285, 438589, H01L 21336, H01L 213205

Patent

active

059638079

ABSTRACT:
A vertical SiC trench MOSFET power switching FET includes a gate electrode in the trench. The MOSFET adds a buried region of a first conductivity type, more heavily doped than a base layer of the first conductivity type, to the base layer except adjacent to the trench. The buried region is preferably disposed in the base layer, or between a drift layer of a second conductivity type and the base layer. The region of the first conductivity type is optionally disposed below the bottom of the trench to encourage expansion of the depletion layer of the MOSFET. A depletion-type vertical SiC MESFET of the invention includes a buried region of the first conductivity type in a base layer of a second conductivity type. A Schottky electrode on a portion of the base layer above the buried region ensures adequate expansion of a depletion layer.

REFERENCES:
patent: 5155052 (1992-10-01), Davies
patent: 5322802 (1994-06-01), Baliga et al.
patent: 5397728 (1995-03-01), Sasaki et al.
patent: 5399515 (1995-03-01), Davis et al.
patent: 5770514 (1998-06-01), Matsuda et al.
patent: 5895939 (1999-04-01), Ueno

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