Silicided polysilicon spacer for enhanced contact area

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C438S682000, C257SE29152

Reexamination Certificate

active

07598572

ABSTRACT:
An integrated circuit device having an increased source/drain contact area by a formed silicided polysilicon spacer. The polysilicon sidewall spacer is formed having a height less than seventy percent of said gate conductor height, and having a continuous surface silicide layer over the deep source and drain regions. The contact area is enhanced by the silicided polysilicon spacer.

REFERENCES:
patent: 6137149 (2000-10-01), Kodama
patent: 6169017 (2001-01-01), Lee
patent: 6566208 (2003-05-01), Pan et al.
patent: 6727135 (2004-04-01), Lee et al.
patent: 7141849 (2006-11-01), Iwata et al.
patent: 2004/0145009 (2004-07-01), Min et al.
patent: 2006/0073666 (2006-04-01), Lim et al.
patent: 2008/0142867 (2008-06-01), Lee et al.
patent: 2008/0272398 (2008-11-01), Bronner et al.

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