Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-12-15
1999-07-13
Brown, Peter Toby
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438239, 438652, 438656, 438682, 438683, H01L 21283
Patent
active
059240113
ABSTRACT:
A method is disclosed for fabricating mixed analog/digital devices without incurring detrimental effects of high temperature forming of analog components such as capacitor and resistor on the silicide contacts of digital devices. Conversely, the possible adverse effects of silicide formation on the analog components is circumvented. These are accomplished by performing the silicidation of the FET device after forming the two electrode plates of the dual layer capacitor while protecting the capacitor with a capacitor protective oxide (CPO). In a second embodiment, local polysilicon (poly-Si) interconnect is formed simultaneously with the formation of the second plate of the capacitor, and the local interconnect is silicidated subsequently and simultaneously with the silicidation of the polysilicon gate and areas above the source/drain regions. In still another third embodiment, a high-value resistor is formed simultaneously with the forming of the second polysilicon electrode of the capacitor. The resistor is protected along with the capacitor by means of the CPO while the FET device area is silicidated.
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Ackerman Stephen B.
Brown Peter Toby
Oh Edwin
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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