Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2006-04-04
2006-04-04
Phu, Phuong (Department: 2631)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S376000, C375S233000, C369S053340, C369S053350
Reexamination Certificate
active
07023946
ABSTRACT:
A signal processor used to process an analog read signal representing data stored on a magnetic disk allows for a faster read operation without requiring an increase in its circuit area or buffer memory space. The signal processor includes a decision feedback equalizer which selectively provides a feedback signal added to a read signal in reproducing data read from a storage medium. The signal processor also performs error correction. In performing error correction, the load of the error correcting process is detected and the processing speed is altered depending upon the detected load.
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Office Action of Nov. 4, 2002, Referencing Kim's patent 5,917,855 of Jun. 1999.
V. Yu, et al., “Error Propagation Evaluation for RLL-Constrained DFE Read Channels”,IEEE Transactions on Magnetics, vol. 34, No. 1, Jan. 1998.
Horibe Koji
Moriuchi Tsunehiko
Nakano Manabu
Nakata Yoshitaka
Sawada Masaru
Fujitsu Limited
Phu Phuong
Westerman Hattori Daniels & Adrian LLP
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