Signal processing method and signal processing circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S764000, C714S752000

Reexamination Certificate

active

10922227

ABSTRACT:
In one embodiment, a symbol error correction encoder effects block interleaving on recording data and thereafter performs first error correction encoding on the recording data. Next, a symbol error correction encoder performs encoding on the whole block. A reproducing processing circuit outputs likelihood information of respective bits. A first error correction decoder corrects a random error produced upon recording and reproduction, using the likelihood information. Since it is possible to make an improvement in performance with respect to the random error by repetitive decoding at this time, the post-correction data is returned to the reproducing processing circuit. After the completion of such repetitive processing, the data is digitized and subjected to an error correction in symbol unit by a hard determination, and outputted to a symbol error correction decoder.

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patent: 2002/0073379 (2002-06-01), Kuwano et al.
patent: 2001-285080 (2001-10-01), None
Conway, “A new target response with parity coding for high density magnetic recording channels,”IEEE Trans. Magn., 34(4):2382-2386 (1998).

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