Signal driver having selectable aggregate slew rate to...

Details Signal driver having selectable aggregate slew rate to... Signal driver having selectable aggregate slew rate to...

2007-07-05

2009-10-06

Barnie, Rexford N (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S027000, C327S108000, C327S138000

Reexamination Certificate

active

07598772

ABSTRACT:
A signal driver having a selectable aggregate slew rate, a method of driving a signal driver and a signal driver incorporating the driver or the method. The driver includes plural partial drivers configured to output signals based on time constants established by corresponding plural time-delay networks associated therewith. The signal driver further includes a slew rate selector coupled to the plural time-delay networks and configured to provide a common signal thereto to cause the plural time-delay networks to achieve target time constants, the target time constants causing the output signals to be generated such that the signal driver achieves the selectable aggregate slew rate.

REFERENCES:
patent: 6744287 (2004-06-01), Mooney et al.
patent: 7176729 (2007-02-01), Hayashi et al.
patent: 2005/0127967 (2005-06-01), Allen
patent: 2007/0069784 (2007-03-01), Shin et al.

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