Short channel lateral MOSFET and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S270000, C438S276000, C438S289000, C438S301000, C257S335000, C257S343000, C257S492000, C257S493000, C257SE21214, C257SE21417, C257SE21427, C257SE29040, C257SE29266, C257SE29268

Reexamination Certificate

active

07851314

ABSTRACT:
A short channel Lateral MOSFET (LMOS) and method are disclosed with interpenetrating drain-body protrusions (IDBP) for reducing channel-on resistance while maintaining high punch-through voltage. The LMOS includes lower device bulk layer; upper source and upper drain region both located atop lower device bulk layer; both upper source and upper drain region are in contact with an intervening upper body region atop lower device bulk layer; both upper drain and upper body region are shaped to form a drain-body interface; the drain-body interface has an IDBP structure with a surface drain protrusion lying atop a buried body protrusion while revealing a top body surface area of the upper body region; gate oxide-gate electrode bi-layer disposed atop the upper body region forming an LMOS with a short channel length defined by the horizontal length of the top body surface area delineated between the upper source region and the upper drain region.

REFERENCES:
patent: 7514329 (2009-04-01), Pendharkar et al.
patent: 2010/0237416 (2010-09-01), Hebert

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