Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2007-01-30
2007-01-30
Elmore, Stephen C. (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S140000, C711S158000, C708S233000
Reexamination Certificate
active
10404182
ABSTRACT:
A general-purpose serial operation pipeline realizes a complicated processing flow with an extemporaneous and explosive amount of operations with respect to various data sizes. A plurality of arithmetic-logic circuits (SALCs) that are controlled individually, and that can be operated together with another arithmetic-logic circuit (SALC) are connected in a cascade manner to form a serial operation pipeline. At least one of the plural SALCs includes a line for outputting data from an upstream SALC to a downstream SALC, a line for feeding back reverse data from the downstream SALC to the upstream SALC, and latch circuits for latching the data on the respective lines, thereby being capable of feeding back data from an arbitrary SALC to another SALC.
REFERENCES:
patent: 5163018 (1992-11-01), Ikegaya et al.
patent: 5532938 (1996-07-01), Kondo et al.
Elmore Stephen C.
Kim Daniel
Lerner,David,Littenberg, Krumholz & Mentlik, LLP
Sony Computer Entertainment Inc.
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