Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-08-23
2011-08-23
Lee, Cheung (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S128000, C438S261000, C438S637000, C257SE21180, C257SE21210
Reexamination Certificate
active
08003468
ABSTRACT:
Devices and methods for isolating adjacent charge accumulation layers in a semiconductor device are disclosed. In one embodiment, a semiconductor device comprises a bit line formed in a semiconductor substrate, a charge accumulation layer formed on the semiconductor substrate, a word line formed on the charge accumulation layer across the bit line, and a channel region formed in the semiconductor substrate below the word line and between the bit line and its adjacent bit line. For the semiconductor device, the charge accumulation layer is formed above the channel region in a widthwise direction of the word line, and a width of the word line is set to be narrower than a distance between an end of the channel region and a central part of the channel region in a lengthwise direction of the word line.
REFERENCES:
patent: 2008/0239789 (2008-10-01), Shino et al.
Hayakawa Yukio
Inoue Fumihiko
Souma Haruki
Lee Cheung
Spansion LLC
LandOfFree
Separation methods for semiconductor charge accumulation... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Separation methods for semiconductor charge accumulation..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Separation methods for semiconductor charge accumulation... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2652992