Sensing method and apparatus for resistance memory device

Static information storage and retrieval – Systems using particular element – Resistive

Reexamination Certificate

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C365S158000

Reexamination Certificate

active

06859383

ABSTRACT:
An MRAM memory integrated circuit is disclosed. Resistance, and hence logic state, is determined by discharging a first charged capacitor through an unknown cell resistive element to be sensed at a fixed voltage, and a pair of reference capacitors. The rate at which the parallel combination of capacitors discharge is between the discharge rate associated with a binary ‘1’ and ‘0’ value, and thus offers a reference for comparison.

REFERENCES:
patent: 6128239 (2000-10-01), Perner
patent: 6256247 (2001-07-01), Perner
patent: 6317376 (2001-11-01), Tran et al.
patent: 6462982 (2002-10-01), Numata et al.
patent: 6590804 (2003-07-01), Perner
patent: 6597598 (2003-07-01), Tran et al.
patent: 6693826 (2004-02-01), Black et al.

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