Sense circuit for tracking charge transfer through access transi

Details Sense circuit for tracking charge transfer through access transi Sense circuit for tracking charge transfer through access transi

1994-07-15

1995-11-07

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518911, 365205, 365210, G11C 1140

Patent

active

054652324

ABSTRACT:
A simple, low-power sense circuit is disclosed that accurately tracks charge transfer between the capacitor of a dynamic random access memory cell and its associated digit line. The circuit, which is preferably located in the peripheral circuitry, employs a model access transistor to charge a pull-up node that is coupled to ground through a capacitor which simulates digit line capacitance. The pull-up node is coupled to the gate of a N-channel field-effect output transistor. When voltage on the node reaches the threshold voltage of the output transistor, the output transistor begins to turn on. The output from the output transistor (in this case, ground potential) is fed back to the gate of a P-channel device which couples the node to V.sub.CC. The P-channel device is used to pull up the node to V.sub.CC rapidly once the trip point (i.e., the threshold voltage) of the N-channel output transistor is reached. The sense circuit is reset for the next read cycle by sending a high signal to the gate of an N-channel reset transistor, which couples the capacitive node to ground.

REFERENCES:
patent: 4298960 (1981-11-01), Mitake et al.

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