Static information storage and retrieval – Read/write circuit
Patent
1996-01-04
1998-04-14
Nguyen, Tan T.
Static information storage and retrieval
Read/write circuit
36518517, 36518521, 365205, 365194, G11C 700
Patent
active
057401128
ABSTRACT:
A sense amplifier for signal detection for use in an electrically erasable and programmable read-only memory (EEPROM). The sense amplifier includes a first clock signal-synchronized inverter including a first inverter and first switch for switching between activating and deactivating states of the first inverter, the first clock signal-synchronized inverter having a first input connected to a corresponding one of the bit lines and a first output. A second clock signal-synchronized inverter is arranged in parallel with the first clock signal-synchronized inverter and includes a second inverter and a second switch for switching between activating and deactivating states of the second inverter, the second clock signal-synchronized inverter having an input connected to the output of the first clock signal-synchronized inverter and an output connected to the input of the first clock signal-synchronized inverter. The switches in the first and second clock signal-synchronized inverters are activated with a delay so that a potential on the corresponding bit line is reliably sensed and latched at the output of the first clock signal-synchronized inverter.
REFERENCES:
patent: 5023841 (1991-06-01), Akrout et al.
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patent: 5140199 (1992-08-01), Seo
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Kynett et al. "A 90-ns One-Million Erase/Program Cycle 1-Mbit Flash Memory", IEEE Journal of Solid-State Circuits, vol. 24, No. 5, Oct. 1989, pp. 1259-1264.
Iwata Yoshihisa
Momodomi Masaki
Ohuchi Kazunori
Saito Shinji
Sakui Koji
Kabushiki Kaisha Toshiba
Nguyen Tan T.
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