Sense amplifier drive circuits responsive to predecoded...

Details Sense amplifier drive circuits responsive to predecoded... Sense amplifier drive circuits responsive to predecoded...

2005-01-25

2005-01-25

Hoang, Huan (Department: 2818)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S207000, C365S230060

Reexamination Certificate

active

06847567

ABSTRACT:
Sense amplifier drive circuits drive a sense amplifier in a semiconductor (integrated circuit) memory device. A sense amplifier drive signal generator is configured to generate a sense amplifier drive signal responsive to at least one predecoded column address received at an input thereof. The sense amplifier drive signal generator may receive predecoded column addresses from a column predecoder. A delay circuit coupled to the sense amplifier drive signal generator may delay the sense amplifier drive signal by a selected time and output a delayed sense amplifier drive signal for driving the sense amplifier. The selected time may be based on a time from activation of a bit line selection signal of the semiconductor (integrated circuit) memory device to application of selected data to the sense amplifier. Corresponding methods are also provided.

REFERENCES:
patent: 5469392 (1995-11-01), Ihara
patent: 5691943 (1997-11-01), Yun
patent: 5930197 (1999-07-01), Ishibashi et al.
patent: 6128213 (2000-10-01), Kang
patent: 6144596 (2000-11-01), Ahn
patent: 6404688 (2002-06-01), Okuyama et al.
patent: 6552954 (2003-04-01), Fujisawa et al.

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