Sense amplifier control circuit

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365230, 365241, G11C 1300

Patent

active

048254100

ABSTRACT:
An improved memory sensing control circuit is provided wherein pulses derived from row or word address changes and from column or bit address changes are used to produce set pulses which are applied at optimum time intervals to a sense amplifier. More particularly, the memory sensing control circuit includes first and second paths for transmitting a bit decoder drive pulse coupled to a sense amplifier set device and means responsive to pulses derived from row or word and column or bit address change detecting means for selecting one of the first and second paths.

REFERENCES:
patent: 4429375 (1984-01-01), Kobayashi et al.
patent: 4649522 (1987-03-01), Kirsch
patent: 4663735 (1987-05-01), Novak et al.

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