Sense amplified output control circuit

Details Sense amplified output control circuit Sense amplified output control circuit

1996-08-23

1997-12-09

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365207, 365208, G11C 700, G11C 702

Patent

active

056967195

ABSTRACT:
An improved sense amplifier output control circuit of a semiconductor memory device increases the operational speed and reduces possible noise. A sense amplifier senses a data read from a memory cell in accordance with a sense enable signal applied thereto. A Schmitt trigger circuit outputs the same level signal when the level difference between a data signal outputted from the sense amplifier and a data bar signal inverted from the data signal is below a predetermined value, and outputs a different level signal when the level difference is increased more than a predetermined value. A data latch circuit inverts and outputs an output signal outputted from the Schmitt trigger circuit in accordance with a latch enable signal inputted thereto. A data output buffer outputs the same level signal as a data signal outputted from the sense amplifier when a signal outputted from the data latch circuit has a different level in accordance with an output enable signal inputted thereto.

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