Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2008-03-25
2008-03-25
Dickey, Thomas L. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C714S727000
Reexamination Certificate
active
07348595
ABSTRACT:
A semiconductor device constructed by mounting a plurality of chip intellectual properties (IPs) on a common semiconductor wiring substrate, a method for testing the device and a method for mounting the chip IPs. A silicon wiring substrate on which chip IPs can be mounted is provided. A circuit for a boundary scan test is formed on the silicon wiring substrate by connecting flip flops. The flip flops are connected to wiring and are arranged to test connections in the wiring. The entire IP On Super-Sub (IPOS) device or each chip IP may be arranged to facilitate a scan test, a built-in self-test (BIST), etc., on the internal circuit of the chip IP.
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Ichikawa Osamu
Ohta Mitsuyasu
Takeoka Sadami
Yoshimura Masayoshi
Dickey Thomas L.
Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
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