Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate
Reexamination Certificate
2005-03-08
2005-03-08
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Thinning of semiconductor substrate
C438S153000, C438S253000
Reexamination Certificate
active
06864156
ABSTRACT:
A supporting structure is wafer-bonded to the upper face side of a partially or fully processed device wafer. The device wafer includes a transistor having a well region that extends into the substrate material of the device wafer. The source and drain regions of the transistor extend into the well region. After attachment of the supporting structure, the device wafer is thinned from the back side until the bottom of the well region is reached. To reduce source and drain junction capacitances, etching can continue until the source and drain regions are reached. In one embodiment, all of the well-to-substrate junction is removed in a subsequent etching step, thereby reducing or eliminating the well-to-substrate junction capacitance of the resulting transistor. Resistance between the well electrode and the transistor channel is reduced because the well contact is disposed on the back side of the device wafer directly under the gate of the transistor.
REFERENCES:
patent: 5354695 (1994-10-01), Leedy
patent: 5436173 (1995-07-01), Houston
patent: 5508219 (1996-04-01), Bronner et al.
patent: 5591678 (1997-01-01), Bendik et al.
patent: 5767549 (1998-06-01), Chen et al.
patent: 5985705 (1999-11-01), Seliskar
patent: 6001667 (1999-12-01), Saitoh et al.
patent: 6063686 (2000-05-01), Masuda et al.
patent: 6420218 (2002-07-01), Yu
patent: 6518613 (2003-02-01), Willer et al.
patent: 6521947 (2003-02-01), Ajmera et al.
patent: 6566713 (2003-05-01), Nii
patent: 6753239 (2004-06-01), Conn
Alex Romanelli, “Intel Stacks Flash Deck in its Favor,” Electronic News, Apr. 10, 2003, available from Reed Electronics Group @ http://www.e-insite.net/electronicnews/index.asp?layout=article&articleid=CA291318.
Q.-Y. Tong, “Semiconductor Wafter Bonding: Science And Technology,” 1999, pp. 229-231, 235-237 & 284-285, available from John Wiley & Sons, Inc., 605 Third Ave, New York, N.Y. 10158-0012.
Liu Justin
Pham Long
Trinh (Vikki) Hoa B.
Wallace T. Lesser
Xilinx , Inc.
LandOfFree
Semiconductor wafer with well contacts on back side does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor wafer with well contacts on back side, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor wafer with well contacts on back side will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3437735