Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
Reexamination Certificate
2006-10-10
2006-10-10
Brewster, William M. (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having junction gate
C438S199000, C438S527000
Reexamination Certificate
active
07118948
ABSTRACT:
A semiconductor wafer has different impurity concentrations in respective regions and gate patterns have different lengths in the respective regions. The semiconductor wafer has different impurity concentrations in a central region, an intermediate region, and an outer region. The gate patterns have different lengths in the central region, the intermediate region, and the outer region. Accordingly, the semiconductor wafer may have a substantially uniform threshold voltage throughout the semiconductor wafer.
REFERENCES:
patent: 6586807 (2003-07-01), Nishida et al.
patent: 6653686 (2003-11-01), Wann
patent: 8055815 (1996-02-01), None
patent: P1999-005862 (1999-01-01), None
Choi Yong-bae
Huh Boo-yung
Brewster William M.
Volentine Francos & Whitt PLLC
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