Semiconductor wafer assemblies comprising silicon nitride, metho

Details Semiconductor wafer assemblies comprising silicon nitride, metho Semiconductor wafer assemblies comprising silicon nitride, metho

1998-04-07

1999-11-16

Whitehead, Jr., Carl

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

438624, 438758, H01L 21318

Patent

active

059857714

ABSTRACT:
In one aspect, the invention includes a method of semiconductive wafer processing comprising forming a silicon nitride layer over a surface of a semiconductive wafer, the silicon nitride layer comprising at least two portions, one of said at least two portions generating a compressive force against the other of the at least two portions, and the other of the at least two portions generating a tensile force against the one of the at least two portions. In another aspect, the invention includes a method of reducing stress on semiconductive wafer, the semiconductive wafer having a pair of opposing surfaces and having more silicon nitride over one of the opposing surfaces than over the other of the opposing surfaces, the method comprising providing the silicon nitride over the one of the opposing surfaces to comprise a first portion, a second portion and a third portion, the first, second and third portions being elevationally displaced relative to one another, the second portion being between the first and third portions, the second portion having a greater stoichiometric amount of silicon than the first and third portions, the semiconductive wafer being subjected to less stress than if the silicon nitride over the one of the opposing surfaces had a constant stoichiometric amount of silicon throughout its thickness. In yet other aspects, the invention includes semiconductive wafer assemblies.

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