Semiconductor wafer and device structure

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257382, 257501, 257506, 257508, 257524, 257725, H01L 2976, H01L 2994

Patent

active

059457163

ABSTRACT:
On a surface of a semiconductor substrate within a device forming region, a MOS transistor including a gate electrode, gate oxide film and source.cndot.drain is formed. An insulating layer is formed on the surface of the semiconductor substrate. In an opening of the insulating layer above the source.cndot.drain, a tungsten plug is formed. At a dicing line portion, the insulating layer has a trench portion. The trench portion is formed to surround the device forming region. A tungsten street having a top surface continuous to the top surface of the insulating layer is formed in the trench. By this semiconductor device, short-circuit between bonding pads and the like can be prevented, and the reliability can be improved.

REFERENCES:
patent: 4392150 (1983-07-01), Courreges
patent: 4924284 (1990-05-01), Beyer et al.
patent: 4977439 (1990-12-01), Esquivel et al.
patent: 5014104 (1991-05-01), Ema
patent: 5045916 (1991-09-01), Vor et al.
patent: 5128744 (1992-07-01), Asano et al.

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