Semiconductor structures using high-dielectric-constant material

Details Semiconductor structures using high-dielectric-constant material Semiconductor structures using high-dielectric-constant material

1995-06-06

1997-03-18

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Die bond

257295, 257700, 257774, H01L 2912, H01L 2992, H01L 2968, H01G 410

Patent

active

056125747

ABSTRACT:
A semiconductor device (10) is illustrated, which is formed on an active region (14) of a semiconductor substrate (12). Device (10) comprises a conductive plug (20) and a barrier layer (22) formed in an opening in an interlevel isolation layer (18). An inner electrode (24) is caused to adhere to the interlevel isolation layer (18) through the use of an adhesion layer (26). High-dielectric-constant layer (28) and an outer electrode (30) are formed outwardly from inner electrode (24).

REFERENCES:
patent: 5187638 (1993-02-01), Sandhu et al.
patent: 5382817 (1995-01-01), Kashihara et al.
patent: 5418388 (1995-05-01), Okudaira et al.
Eimori et al. "A Newly Designed Planar Stacked Capacitor Cell with High dielectric Constant Film for 256mbit DRAM," IEEE, Dec. 5-8, 1993.

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