Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – With lattice constant mismatch
Reexamination Certificate
2006-04-21
2009-02-24
Smith, Matthew S. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
With lattice constant mismatch
C257SE21550, C257S191000
Reexamination Certificate
active
07495267
ABSTRACT:
A semiconductor structure including a highly strained selective epitaxial top layer suitable for use in fabricating a strained channel transistor. The top layer is deposited on the uppermost of a series of one or more lower layers. The lattice of each layer is mismatched with the lattice of its subjacent layer by an amount not less than the lattice mismatch between the lowest layer of the series and a substrate on which it resides. A trench is formed in the uppermost series layer. The trench has rounded corners so that a dielectric material filling the trench conforms to the round corners. The rounded corners are produced by heating the uppermost series layer after trench formation.
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Ge Chung-Hu
Hu Chenming
Lee Wen-Chin
Kim Sun M
Slater & Matsil L.L.P.
Smith Matthew S.
Taiwan Semiconductor Manufacturing Company , Ltd.
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