Semiconductor structure comprising field effect transistors...

Details Semiconductor structure comprising field effect transistors... Semiconductor structure comprising field effect transistors...

2007-03-14

2009-10-27

Prenty, Mark (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S230000, C257S369000

Reexamination Certificate

active

07608499

ABSTRACT:
A method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first transistor element and a second transistor element. Each of the first transistor element and the second transistor element comprises a gate electrode. A stressed material layer is deposited over the first transistor element and the second transistor element. The stressed material layer is processed to form from the stressed material layer sidewall spacers adjacent the gate electrode of the second transistor element and a hard mask covering the first transistor element. A pair of cavities is formed adjacent the gate electrode of the second transistor element. A pair of stress-creating elements is formed in the cavities and the hard mask is at least partially removed.

REFERENCES:
patent: 7303949 (2007-12-01), Chen et al.
patent: 2004/0262683 (2004-12-01), Bohr et al.
patent: 2005/0112817 (2005-05-01), Cheng et al.
patent: 2005/0266631 (2005-12-01), Kim et al.
Chan et al., “Strain for CMOS Performance Improvement,”IEEE 2005 Custom Integrated Circuits Conference, pp. 667-674, 2005.

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