Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2005-10-18
2005-10-18
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S118000, C438S455000, C438S459000, C438S692000, C438S959000, C438S977000, C438S981000
Reexamination Certificate
active
06955971
ABSTRACT:
A semiconductor structure and methods for fabricating are disclosed. In an implementation, a method of fabricating a semiconductor structure includes forming a first semiconductor material substrate with a first dielectric area having a first thickness and a second dielectric area having a second thickness, bonding the first substrate to a second semiconductor substrate, and thinning at least one of the first and second substrates. The invention also pertains to a semiconductor structure. The structure includes a semiconductor substrate having a surface layer of semiconductor material, a first dielectric layer of a first dielectric material buried under the surface layer, and a second dielectric layer buried under the surface layer. In an embodiment, the thickness of the first dielectric layer is different than the thickness of the second dielectric layer.
REFERENCES:
patent: 5091330 (1992-02-01), Cambou et al.
patent: 5238865 (1993-08-01), Eguchi
patent: 5369050 (1994-11-01), Kawai
patent: 5436173 (1995-07-01), Houston
patent: 5548149 (1996-08-01), Joyner
patent: 5950094 (1999-09-01), Lin et al.
patent: 6091109 (2000-07-01), Hasegawa
patent: 6150220 (2000-11-01), Huh et al.
patent: 6204546 (2001-03-01), Roitman et al.
patent: 6333532 (2001-12-01), Davari et al.
patent: 6362059 (2002-03-01), Fukasaku et al.
patent: 6503811 (2003-01-01), Ohkubo
patent: 6583011 (2003-06-01), Xia et al.
patent: 2001/0018274 (2001-08-01), Sugizaki et al.
patent: 2002/0047159 (2002-04-01), Yamazaki et al.
patent: 2002/0157790 (2002-10-01), Abe et al.
patent: 0 687 002 (1995-12-01), None
patent: 0 701 286 (1996-03-01), None
patent: 1 193 754 (2002-04-01), None
patent: 1 246 248 (2002-10-01), None
patent: 2 823 596 (2002-10-01), None
patent: 05 190657 (1993-07-01), None
patent: 11145481 (1999-05-01), None
patent: 2000349148 (2000-12-01), None
patent: WO 00/48245 (2000-08-01), None
patent: WO 01 54174 (2001-07-01), None
patent: WO 01/61743 (2001-08-01), None
Aulnette Cécile
Ghyselen Bruno
Mazure Carlos
Rayssac Oliver
Fourson George
Garcia Joannie Adelle
S.O.I.Tec Silicon on Insulator Technologies S.A.
Winston & Strawn LLP
LandOfFree
Semiconductor structure and methods for fabricating same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor structure and methods for fabricating same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor structure and methods for fabricating same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3459075