Semiconductor storage device

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S189011

Reexamination Certificate

active

07817486

ABSTRACT:
A bit line potential monitor circuit is provided in a bit line, and a step-down circuit of the bit line is controlled base on information from the monitor circuit. As a result, the bit line is easily stepped down to an optimal potential level in accordance with a potential and a load capacity thereof without being affected by variability in devices or operation conditions.

REFERENCES:
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patent: 2002/0159309 (2002-10-01), Yamanaka
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patent: 2003-288788 (2003-10-01), None
Khellah, Muhammad et al., “Wordline & Bitline Pulsing Schemes for Improving SRAM Cell Stability in Low-Vcc 65nm CMOS Designs,” 2006 Symposium on VLSI Circuits Digest of Technical Papers.

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