Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate
2007-12-05
2009-11-17
Le, Thong Q (Department: 2827)
Static information storage and retrieval
Read/write circuit
Precharge
C365S196000, C365S202000, C365S207000, C365S189040, C365S191000
Reexamination Certificate
active
07619939
ABSTRACT:
A cell array selection circuit, a cell array bit line precharge circuit, and a sense amplifier bit line precharge circuit are provided in a semiconductor storage apparatus. In a standby state of read/write operation, the cell array selection circuit is controlled to an inactive state, and the bit line precharge circuits are controlled to an active state. In an active state of read/write operation, the cell array selection circuit to be selected is controlled to an active state, and the cell array bit line precharge circuit and the sense amplifier bit line precharge circuit are controlled to an inactive state. Cell array selection transistors, sense amplifier bit line precharge transistors, and control signals supplied to gate electrodes of the transistors are set in which change in potential provided on a cell array bit line pair when the states of the transistors change is cancelled.
REFERENCES:
patent: 6449204 (2002-09-01), Arimoto et al.
patent: 7177215 (2007-02-01), Tanaka et al.
patent: 2004-87074 (2004-03-01), None
Kabushiki Kaisha Toshiba
Le Thong Q
Oblon, Spivak, McCelland, Maier & Neustadt L.L.P.
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