Semiconductor readout circuit

Details Semiconductor readout circuit Semiconductor readout circuit

2006-04-11

2006-04-11

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S207000, C365S189090

Reexamination Certificate

active

07027341

ABSTRACT:
A semiconductor readout circuit includes a precharge circuit which charges a bit line connected to a memory cell to its predetermined precharge voltage before reading out information stored in the memory cell, a feedback-type bias circuit which controls a voltage of the bit line to its predetermined voltage, a sense amplifier which detects and amplifies a change in a voltage of a readout input node connected to the bit line via a transfer gate of the feedback-type bias circuit, and a load circuit which charges the readout input node. The load circuit is made inactive at least for a fixed period immediately before ending of a precharge period when the precharge circuit is active, and is made active after ending of the precharge period.

REFERENCES:
patent: 5537349 (1996-07-01), Devin
patent: 5671186 (1997-09-01), Igura et al.
patent: 5808934 (1998-09-01), Kubo et al.
patent: 6191979 (2001-02-01), Uekubo
patent: 6353560 (2002-03-01), Morikawa
patent: 6944077 (2005-09-01), Morikawa
patent: 1049102 (2000-11-01), None
patent: 2000-311493 (2000-11-01), None
European Search Report mailed Sep. 27, 2005 for European Patent Application No. 04 25 8043, 3 pages.

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