Semiconductor read-only memory with selection circuitry for rout

Static information storage and retrieval – Read/write circuit – Differential sensing

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36518907, 36523006, G11C 702

Patent

active

060698314

ABSTRACT:
A semiconductor read-only memory includes a main memory cell array having a plurality of first and second bit lines arranged in a hierarchical configuration. A dummy cell array generates a reference potential during a read-out operation. A decoder circuit generates a first, second, third and fourth selection signals from address signals, and a sense amplifier circuit detects data stored in a memory cell of the main memory cell array. A switching circuit connects the dummy cell to the sense amplifier circuit through the second bit line. The read-only memory according to the invention has an advantage that it is possible to accomplish an efficient read-out operation without additional dummy bit lines in an area of the memory cell array.

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patent: 5659503 (1997-08-01), Sudo et al.
patent: 5694369 (1997-12-01), Abe
patent: 5886937 (1999-03-01), Jang

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