Semiconductor read only memory device with improved access time

Static information storage and retrieval – Read/write circuit – Differential sensing

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365205, G11C 700

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active

046929029

ABSTRACT:
A semiconductor memory device in which the differential amplifier circuit compares a potential of a bit line to which memory cells storing information are connected with a reference potential of a dummy line to which a dummy cell is connected, and detects information stored in each of the memory cells. The semiconductor memory device comprises a circuit which discharges both the bit line and the dummy line to a low potential when the chip enable inverted signal is supplied. When the chip enable signal is supplied, therefore, the differential amplifier circuit can detect a difference between the bit line potential and the dummy line potential before the bit line is fully charged up. This makes it possible to produce the chip enable access time and to realize higher speed operations.

REFERENCES:
patent: 4090257 (1978-05-01), Williams
patent: 4223394 (1980-09-01), Pathak et al.
patent: 4249095 (1981-02-01), Hsu
patent: 4494219 (1985-01-01), Tanaka et al.
Wilson, et al., "A 100ns 150mW 64Kbit ROM", IEEE International Solid--State Circuits Conf., Feb. 1978, Digest of Technical Papers, IEEE, New York, pp. 152, 153, 273.

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