Semiconductor pipeline memory device eliminating time loss due t

Details Semiconductor pipeline memory device eliminating time loss due t Semiconductor pipeline memory device eliminating time loss due t

1995-09-26

1996-11-26

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365194, 36523007, 365233, G11C 700, G11C 800

Patent

active

055792677

ABSTRACT:
A semiconductor pipeline memory device has a controller for producing first, second and third timing clock signals for transferring a column address and a read-out data bit through first, second and third pipeline stages to an input-and-output pin, and long time interval between two of the first, second and third timing clock signals and short time interval between another two of the first, second and third timing clock signals are respectively assigned to one of the first to third pipeline stages with relatively long signal path and another of the first to third pipeline stages with relatively short signal path, thereby decreasing undesirable time loss.

REFERENCES:
patent: 5471607 (1995-11-01), Garde

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