Semiconductor packaging device and manufacture thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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Details

C257S774000, C257S780000, C257S686000

Reexamination Certificate

active

07122904

ABSTRACT:
A semiconductor packaging device comprises a carrier having at least a cavity or a slot thereon. At least a chip has a back surface and an active surface with a plurality of first bonding pads. The chip is affixed to the cavity to expose the active surface. A first insulating layer is on the active surface and the carrier, which comprises first via-conductor connected to first bonding pads and via the first insulating layer. A multi-layer structure on the first insulating layer comprises a plurality of conductive layout lines, second via-conductor therein, and a second insulating layer, exposed ball pads, and flip-chip pads thereon. The first via-conductor are electrically connected with the conductive layout lines, the second via-conductor, the exposed ball pads, and the flip-chip pads. The first solder balls are affixed to the ball pads, and at least a second chip is affixed to the flip-chip pads through a plurality of second solder balls.

REFERENCES:
patent: 5353498 (1994-10-01), Fillion et al.
patent: 5524339 (1996-06-01), Gorowitz et al.
patent: 6075712 (2000-06-01), McMahon
patent: 6140707 (2000-10-01), Plepys et al.
patent: 6271469 (2001-08-01), Ma et al.
patent: 2002/0074652 (2002-06-01), Pierce

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