Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2008-05-19
2009-10-06
Tran, Thien F (Department: 2895)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S777000
Reexamination Certificate
active
07598607
ABSTRACT:
Provided is a semiconductor package with enhanced joint reliability and methods of fabricating the same. The method includes: forming package units including a semiconductor chip interposed between a bottom layer and a top layer; and sequentially stacking the package units on a substrate. The bottom layer and the top layer are formed of a material having a lower modulus than the semiconductor chip. The semiconductor package includes: at least one package unit disposed on a substrate, the package unit including a semiconductor chip having a pad, a bottom layer and a top layer substantially surrounding the semiconductor chip, and a redistribution structure overlying the top layer. The redistribution structure is electrically connected to the pad.
REFERENCES:
patent: 6714418 (2004-03-01), Frankowsky et al.
patent: 2006-165320 (2006-06-01), None
patent: 2006-0064518 (2006-06-01), None
patent: 2007-0006327 (2007-01-01), None
Chung Hyun-Soo
Jang Dong-Hyeon
Kang Sun-Won
Kim Nam-Seog
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
Tran Thien F
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