Semiconductor package with bypass capacitor

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S688000, C257S692000, C257S690000, C257S693000

Reexamination Certificate

active

07667317

ABSTRACT:
A semiconductor package comprises a substrate, which has two surfaces and comprises first and second electrical paths. On one of the surfaces, a semiconductor chip is mounted. The semiconductor chip comprises a plurality of pads, which include a first pad to be supplied with a power supply and a second pad to be grounded. On the other surface, at least one bypass capacitor is mounted. The bypass capacitor comprises first and second terminals, which are connected to the first and the second pads through the first and the second electrical paths, respectively.

REFERENCES:
patent: 6365962 (2002-04-01), Liang et al.
patent: 6384476 (2002-05-01), Takeuchi
patent: 6787916 (2004-09-01), Halahan
patent: 6867502 (2005-03-01), Katagiri et al.
patent: 2002/0008314 (2002-01-01), Takeuchi
patent: 2003/0173676 (2003-09-01), Horikawa
patent: 2004/0036157 (2004-02-01), Akram et al.
patent: 6-005771 (1994-01-01), None
patent: 09-260537 (1997-10-01), None
patent: 10-294335 (1998-11-01), None
patent: 2000-307005 (2000-11-01), None
patent: 2002-118197 (2002-04-01), None
patent: 2003-264253 (2003-09-01), None

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