Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
1998-12-31
2001-09-18
Whitehead, Jr., Carl (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S676000, C257S686000, C257S730000, C257S738000
Reexamination Certificate
active
06291892
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to an improvement applicable to a semiconductor device and a method for producing a semiconductor device. More specifically, this invention relates to an improvement applicable to a semiconductor device packaged in a chip scale package and a method for production thereof, the improvement being developed for the purpose to simplify the production procedure for producing a semiconductor device packaged in a chip scale package and to improve the heat dissipation efficiency and the integration of a semiconductor device packaged in a chip scale package.
BACKGROUND OF THE INVENTION
AND
PRIOR ART STATEMENT
When being put into practical services, a semiconductor device chip is usually packaged in a casket package or in a plastic molded package, for the purpose to be protected from external hazards including mechanical, chemical and radioactive ones. In order to satisfy an increasingly severer requirement for a compact and thinner semiconductor device, a semiconductor device packaged in a chip scale package was developed. One example thereof is disclosed in TOKU KAI HEI 8-125066 or JP-A 8-125066, the cross section thereof being copied in
FIG. 1
attached hereto.
Referring to
FIG. 1
, a semiconductor device chip
1
having at least one semiconductor device element disposed therein and having plural bonding pads
2
arranged on the top surface thereof is provided with plural leads
3
each of which has a side view of an L-shape and each of which is adhered on the top surface of the semiconductor device chip
1
. A hardened adhesive employed for adhering the leads
3
on the semiconductor device chip
1
is shown by a label
4
in the drawing. Each of the leads
3
is connected with each of the bonding pads
2
employing a bonding wire made of Au or the like. All the surfaces of the semiconductor device chip
1
is covered by a molded plastic layer
6
, remaining tips
3
A of the leads
3
uncovered. On the tips
3
A, external terminals
7
made of a solder or the like are arranged, to be employed for connecting each of the foregoing leads
3
with each of wirings arranged on a printed circuit board (not shown) on which the foregoing semiconductor device packaged in a plastic molded package is scheduled to be mounted.
FIG. 2
illustrates the rear surface of the packaged semiconductor device of which the cross section is illustrated in FIG.
1
. As is clear from the drawings, the horizontal dimension of the packaged semiconductor device is not so larger than that of the semiconductor device chip proper
1
. The thickness of the packaged semiconductor device is small as well, because the thickness of the molded plastic layer
6
is not so large.
Unfortunately, however, the packaged semiconductor device of which the cross section is illustrated in
FIG. 1
is involved with a drawback in which the production procedure is complicated particularly for the steps for producing the leads
3
having a side view of an L-shape. The other drawback accompanying the packaged semiconductor device of which the cross section is illustrated in
FIG. 1
is a less sufficient grade of heat dissipation efficiency which is caused by a rather thick plastic layers covering the semiconductor device chip
1
.
OBJECTS AND SUMMERY OF THE INVENTION
Accordingly, an object of this invention is to provide a semiconductor device packaged in a chip scale package of which the production procedure is simple and the heat dissipation efficiency is improved.
An additional object of this invention is to provide a semiconductor device packaged in a chip scale package wherein the integration is remarkably improved.
The other object of this invention is to provide a method for producing a semiconductor device packaged in a chip scale package of which the production procedure is simple and the heat dissipation efficiency and the integration are improved.
To achieve the first one of the foregoing objects, a semiconductor device in accordance with a first embodiment of this invention is based on a concept that the plural leads
3
each of which has a side view of an L-shape which were essential for the semiconductor device packaged in a chip scale package available in the prior art and which is illustrated in
FIG. 1
are replaced by plural bonding pads
11
arranged on an insulator frame
12
further arranged on a flange
8
B extending from the top edge of a side wall
8
C rising from the external edge of a bottom plate
8
A of a shallow metal basin
8
for the purpose to remove the complicated procedure for producing the L-shaped leads
3
which were essential for the semiconductor device available in the prior art and which is illustrated in
FIG. 1
, for the ultimate purpose to simplify the production process, and the molded plastic bottom and side plates of the semiconductor device packaged in a chip seal package available in the prior art are replaced by a shallow metal basin, for the purpose to improve the heat dissipation efficiency, for the ultimate purpose to improve the operation speed of the semiconductor device of the first embodiment of this invention.
As a result, a semiconductor device in accordance with the first embodiment of this invention can be described as a semiconductor device provided with a shallow metal basin having a flange outwardly extending from the top edge of the side wall of the shallow metal basin, to receive a semiconductor device chip having one or more semiconductor device elements disposed therein and one or more bonding pads arranged thereon, an insulator frame having one or more external terminals arranged thereon, the external terminals being connected with the bonding pads, and the insulator frame being arranged on the flange of the shallow metal basin, and a plastic layer molded to cover the semiconductor device chip.
To achieve the first one of the foregoing objects, a semiconductor device in accordance with a second embodiment of this invention is based on a concept that the foregoing insulator frame
12
has a structure to be fitted to the side wall of the foregoing shallow metal basin
10
and the foregoing metal balls
16
are replaced by pairs of external terminals consisting of an upper conductor piece and a lower conductor piece connected with each other by a conductor layer g a through-hole penetrating the insulator frame for the purpose to remove a welding or soldering process for the ultimate purpose to simply the production procedure and to introduce versatility for the production process for producing a semiconductor device in accordance with the second embodies of this invention.
As a result, a semiconductor device in accordance with the second embodiment of this invention can be described as a semiconductor device provided with a shallow metal basin having a flange outwardly extending from the top edge of the side wall of the shallow metal basin, to receive a semiconductor device chip having one or more semiconductor device elements disposed therein and one or more bonding pads arranged thereon, an insulator frame having one or more pairs of external terminals consisting of an upper conductor piece and a lower conductor piece connected with each other by a conductive layer lining a through-hole vertically penetrating the insulator frame, the internal closed surface of the insulator frame being fitted to the external closed surface of the side wall of the shallow metal basin, and a plastic layer molded to cover the semiconductor device chip.
To increase the grade of integration, the semiconductor devices in accordance with the second embodiment of this invention can be piled.
As a result, a semiconductor device in accordance with the third embodiment of this invention can be described as a semiconductor device having a plurality of the semiconductor devices in accordance with the second embodiment of this invention, the semiconductor devices in accordance with the second embodiment of this invention being piled employing solder balls
16
, which intervene between the lower pieces of the external terminals of the upper one of the
Brophy Jamie L.
Jr. Carl Whitehead
Oki Electric Industry Co., Ltd
Rabin & Berdo P.C.
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