Semiconductor package structure

Details Semiconductor package structure Semiconductor package structure

2006-10-17

2006-10-17

Wilczewski, Mary (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Outside periphery of package having specified shape or...

C257S777000, C257S786000, C257S686000, C438S110000

Reexamination Certificate

active

07122893

ABSTRACT:
A semiconductor package structure includes a semiconductor component, a substrate, solder bumps, underfill, a buffer means, and solder balls. The substrate is under the semiconductor component. A joint area is formed between the first surface of the semiconductor and the upper surface of the substrate. Several solder bumps are disposed in the joint area, for electrically connecting the semiconductor component and the substrate. The underfill is filled in the joint area, for coating the solder bumps and tightly jointing the semiconductor component and the substrate. The buffer means is situated in the jointing area, for buffering the underfill to be confined in the joint area. Several solder balls are disposed on the lower surface of the substrate.

REFERENCES:
patent: 6133065 (2000-10-01), Akram
patent: 6433412 (2002-08-01), Ando et al.
patent: 6573592 (2003-06-01), Bolken
patent: 6657311 (2003-12-01), Hortaleza et al.
patent: 6759745 (2004-07-01), Masumoto et al.
patent: 6777797 (2004-08-01), Egawa
patent: 2003/0111720 (2003-06-01), Tan et al.

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