Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With electrical contact in hole in semiconductor
Reexamination Certificate
2007-06-15
2010-06-29
Pham, Hoai v (Department: 2892)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With electrical contact in hole in semiconductor
C257S684000, C257S737000, C257SE23010
Reexamination Certificate
active
07745907
ABSTRACT:
A semiconductor package and a method of fabricating the same are provided. The semiconductor package includes a semiconductor chip and a circuit board. The semiconductor chip has a bond pad. The circuit board has a base substrate with a throughole, and a conductive film pattern placed on a sidewall of the throughole. The throughole is aligned with the bond pad to expose the bond pad. A connector located within the throughole electrically connects the conductive film pattern to the bond pad. A sealing layer covers the connector.
REFERENCES:
patent: 6013948 (2000-01-01), Akram et al.
patent: 7453141 (2008-11-01), Miyagawa et al.
patent: 2001-0061784 (2001-07-01), None
patent: 2002-0001427 (2002-01-01), None
patent: 2002-0028020 (2002-04-01), None
English language abstract of Japanese Publication No. 2001-0061784.
English language abstract of Japanese Publication No. 2002-0001427.
English language abstract of Japanese Publication No. 2002-0028020.
Kim Young-Lyong
Lee Jong-Ho
Pham Hoai v
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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