Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
2007-12-11
2007-12-11
Nadav, Ori (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257S676000, C257S738000, C257S773000, C257S779000, C257S784000
Reexamination Certificate
active
10055266
ABSTRACT:
A semiconductor package utilizing an existing substrate regardless of the change of the semiconductor chip design, and manufacturing method thereof are provided. The semiconductor package including an added wire bonding unit for connecting a redundant bond finger to an added bond finger, or an added wire bonding unit for connecting a redundant bond finger connected to a first printed circuit pattern to a redundant solder ball pad connected to a second printed circuit pattern.
REFERENCES:
patent: 4912603 (1990-03-01), Seyama
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5468994 (1995-11-01), Pendse
patent: 5633785 (1997-05-01), Parker et al.
patent: 6118177 (2000-09-01), Lischner et al.
patent: 6160705 (2000-12-01), Stearns et al.
patent: 6232561 (2001-05-01), Schmidt et al.
patent: 6236108 (2001-05-01), Sota et al.
patent: 6323065 (2001-11-01), Karnezos
patent: 6420789 (2002-07-01), Tay et al.
patent: 6445077 (2002-09-01), Choi et al.
patent: 6445594 (2002-09-01), Nakagawa et al.
patent: 6448664 (2002-09-01), Tay et al.
patent: 6707149 (2004-03-01), Smith
Marger & Johnson & McCollom, P.C.
Nadav Ori
Samsung Electronics Co,. Ltd.
LandOfFree
Semiconductor package having changed substrate design using... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor package having changed substrate design using..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor package having changed substrate design using... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3896699