Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2011-01-25
2011-01-25
Tran, Thien F (Department: 2895)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S778000
Reexamination Certificate
active
07875983
ABSTRACT:
A semiconductor package which includes a first substrate having a pre-designed pattern formed thereon; a first chip mounted by a flip chip method on one side of the first substrate; a support formed to a predetermined thickness on an edge of the first substrate; an interposer having an edge thereof placed on the support, such that the interposer covers the first substrate and forms a cavity between the interposer and the first substrate, and having a pre-designed pattern formed respectively on both sides thereof; a via penetrating the support and the interposer; a second chip mounted on one side of the interposer facing the first substrate; a second substrate placed on the other side of the interposer with at least one conductive ball positioned in-between; and a third chip mounted on the second substrate.
REFERENCES:
patent: 7242081 (2007-07-01), Lee
patent: 7288841 (2007-10-01), Yamano
patent: 2006/0255449 (2006-11-01), Lee et al.
patent: 2007/0235850 (2007-10-01), Gerber et al.
U.S. Appl. No. 12/068,867, filed Feb. 12, 2008, Do-Jae Yoo et al.
U.S. Patent Office Action, mailed Jan. 16, 2009, issued in corresponding U.S. Appl. No. 12/068,867.
U.S. Patent Office Action, mailed Apr. 23, 2009, issued in corresponding U.S. Appl. No. 12/068,867.
U.S. Patent Notice of Allowance, mailed Aug. 26, 2009, issued in corresponding U.S. Appl. No. 12/068,867.
U.S. Patent Notice of Allowance mailed Sept. 13, 2010 in corresponding U.S. Appl. No. 12/591,793.
U.S. Patent Office Action mailed Nov. 19, 2010 in corresponding U.S. Appl. No. 12/591,791.
Choi Seog-Moon
Jang Bum-Sik
Jeong Tae-sung
Kweon Young-Do
Yoo Do-Jae
Samsung Electro-Mechanics Co. Ltd.
Tran Thien F
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