Semiconductor module

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C714S031000, C714S719000

Reexamination Certificate

active

06708302

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor module, and more particularly, to a semiconductor module comprising a plurality of semiconductor chips mounted on a single substrate.
2. Description of the Background Art
FIG. 7
is a conceptual drawing showing a first example configuration of a conventional semiconductor module. A conventional semiconductor module
10
comprises a plurality of semiconductor chips
12
mounted on a single substrate. Each of the semiconductor chips
12
comprises a core circuit
14
, such as a memory cell array or a like circuit, and a plurality of input/output pins
16
. In
FIG. 7
, the plurality of input/output pins
16
are simply denoted by a single line.
The input/output pins
16
of the semiconductor chip
12
are connected to input/output pins
20
of the semiconductor module
10
by way of a level conversion element
18
. In
FIG. 7
, the plurality of input/output pins
20
are simply denoted by a single line. The level conversion element
18
is an interface for establishing a match in signal voltage between a circuit disposed outside the semiconductor module
10
and the semiconductor chip
12
. An address signal and a data signal are exchanged between the input/output pins
20
and an external circuit.
The semiconductor module
10
is shipped after being subjected to diagnosis as to whether or not the module operates properly. The diagnosis mentioned above is significantly more complex and time consuming than a diagnosis performed on a single semiconductor chip
12
. Development of a program for performing such a diagnosis involves an enormous cost and a great deal of time. Moreover, specifying a defective semiconductor chip on the basis of the diagnosis is not necessarily easy.
FIG. 8
is a conceptual drawing showing a second example configuration of a conventional semiconductor module. In
FIG. 8
, those elements, which are the same as the constituent elements shown in
FIG. 7
, are assigned the same reference numerals, and repetition of their explanations is omitted. In a semiconductor module
30
shown in
FIG. 8
, each of a plurality of semiconductor chips
32
has a diagnostic circuit
34
. Upon receipt of a predetermined signal from an external circuit, the diagnostic circuit
34
tests the status of the semiconductor chip
32
and outputs the result to the external circuit. In a case where the semiconductor module
30
is a target of the test, the diagnostic circuit
34
can readily detect whether an individual semiconductor chip
14
is non-defective or defective. Accordingly, the configuration shown in
FIG. 8
can eliminate difficulty that would otherwise be encountered in specifying a defective chip.
In a case where the semiconductor chips
32
shown in
FIG. 8
are target of the test, the plurality of diagnostic circuits
34
provided for the respective semiconductor chips
32
must be controlled individually. In such a case, it becomes necessary that the external circuit individually reads the diagnostic results output from the respective diagnostic circuits
34
. Even in a case where the diagnostic circuit
34
is housed in the semiconductor chip
32
, diagnosing the semiconductor module
30
requires a complicated control program and a great deal of diagnostic time.
If the semiconductor module
10
or
30
is found to incorporate a defective chip, replacement of the chip is not easy. For this reason, if the semiconductor module
10
or
30
incorporates even a single defective chip, the module
10
or
30
as a whole is diagnosed as being defective. As mentioned above, since comprehensive diagnosis of a conventional semiconductor module is not easy and replacement of a defective chip is not easy, there arises a problem of an increase in manufacturing cost and the number of manufacturing steps.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the above-described problem and is aimed at providing a semiconductor module in which the entirety of a plurality of semiconductor chips can be diagnosed readily.
The present invention is also aimed at providing a semiconductor module in which a defective chip can be readily replaced.
The above objects of the present invention are achieved by a semiconductor module including a plurality of semiconductor chips to be mounted on a single substrate. The semiconductor module includes a mode signal pin for receiving a mode signal for requesting performance of a diagnostic operation the semiconductor module also includes a result output pin for outputting a result of diagnosis. The semiconductor module further includes diagnostic circuits for diagnosing the statuses of the corresponding semiconductor chips. The diagnostic circuits are controlled by a diagnosis controller such that all the semiconductor chips are diagnosed in parallel or serially after a mode signal for requesting a diagnostic operation has been supplied to the mode signal pin.


REFERENCES:
patent: 3913072 (1975-10-01), Catt
patent: 4721995 (1988-01-01), Tanizawa
patent: 4729124 (1988-03-01), Hansel et al.
patent: 5159598 (1992-10-01), Welles, II et al.
patent: 5341049 (1994-08-01), Shimizu et al.
patent: 5406566 (1995-04-01), Obara
patent: 5592493 (1997-01-01), Crouch et al.
patent: 5778006 (1998-07-01), Mukai et al.
patent: 6480978 (2002-11-01), Roy et al.
patent: 63-66798 (1988-03-01), None
patent: 7-174824 (1995-07-01), None

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