Semiconductor memory repair methodology using...

Details Semiconductor memory repair methodology using... Semiconductor memory repair methodology using...

2007-11-13

2007-11-13

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Testing

C365S189050, C324S763010

Reexamination Certificate

active

10739701

ABSTRACT:
A device and method is provided for effecting soft repair of semiconductor memory embedded within an integrated circuit. The invention temporarily and in a non-volatile or quasi-non-volatile manner stores data within the structure of the semiconductor chip. This data respects chip performance at a first test point and may be made available directly from the chip at a second test point. In a particular embodiment of the invention, on-chip non-volatile memory is utilized to communicate reconfiguration codes between two testpoints for soft repair of SRAM and DRAM memory. A reconfiguration code generated for the first test point is stored in the on-chip non-volatile memory and read out from that memory at the second test point. Illustratively, the on-chip non-volatile memory is implemented as quasi-non-volatile memory. In a further embodiment, the invention operates to communicate the reconfiguration codes between a single wafer probe testpoint and a package testpoint.

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