Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1995-10-10
1997-11-25
Yoo, Do Hyun
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365193, 365201, G11C 700
Patent
active
056919425
ABSTRACT:
In a semiconductor memory, bit data read out of a memory cell are placed on a data line pair. The gate control circuit detects the transfer of the bit data to the data line pair and activates the control signal. The active control signal turns on the transfer gates located between the data line pair and the output buffer circuit so that the bit data are transferred and held by the latch circuits. The output buffer circuit releases output data represented by the latched bit data to the outside by way of the data input/output pin. This arrangement and operation eliminate the floating state of external output data and extend the duration of valid external output data in one operation cycle.
REFERENCES:
patent: 5515332 (1996-05-01), Pascucci et al.
patent: 5521879 (1996-05-01), Takasugi
patent: 5532961 (1996-07-01), Mori et al.
patent: 5535171 (1996-07-01), Kim et al.
Mitsubishi Denki & Kabushiki Kaisha
Yoo Do Hyun
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