Semiconductor memory having different read and write word line v

Details Semiconductor memory having different read and write word line v Semiconductor memory having different read and write word line v

1987-10-21

1990-08-28

Gossage, Glenn

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523006, 365226, 365190, G11C 700

Patent

active

049531271

ABSTRACT:
A Static Random Access Memory (SRAM) has a word line driving circuit responsive to a mode signal representative of a read-out mode or a write-in mode for supplying one of the word lines coupled to an accessed memory cell with a higher voltage level in the write mode than in the read mode. Each memory cell has a pair of memory transistors turned on or off in a complementary manner depending upon a data bit memorized therein and a pair of transfer transistors respectively coupled between the memory transistors and a pair of bit lines and gated by the word line. Each memory transistor has a decreased gate width by virtue of the word line driving circuit capable of producing the high or low voltage level, thereby allowing each memory cell to occupy a small area of the semiconductor substrate.

REFERENCES:
patent: 4189782 (1980-02-01), Dingwall
patent: 4536859 (1985-08-01), Kamuro
patent: 4563754 (1986-01-01), Aoyama et al.
patent: 4751683 (1988-06-01), Wada et al.

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