Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1986-08-14
1987-10-20
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365220, 365221, 365238, G11C 1300
Patent
active
047018844
ABSTRACT:
A semiconductor memory device is proposed wherein at least an array comprising a plurality of memory cells each having at least one capacity, a select mechanism for specifying the position of each memory cell, data lines connected to said memory cells for transmitting the data and a data writing and a data reading mechanisms are provided. The feature of this device lies in that the voltage generator for serially generating three or more values of the voltage which are different from each other and the means for applying said voltage to said memory cells are provided on the same semiconductor board as the same said memory cells, and as the said reading mechanism the column register is provided which, as said reading mechanism, has the mechanism for deciding the data, transfer gate which is provided between said deciding means and said data line, and the bias charge transfer mechanism which is provided between said transfer gate and said deciding mechanism, and having at least two or more memory elements for temporarily storing said decided data.
REFERENCES:
patent: 4581718 (1986-04-01), Oishi
patent: 4635233 (1987-01-01), Matsumoto et al.
Aoki Masakazu
Horiguchi Masashi
Ikenaga Shin'ichi
Itoh Kiyoo
Masuhara Toshiaki
Fears Terrell W.
Hitachi , Ltd.
Koval Melissa J.
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