Semiconductor memory devices having offset transistors and...

Details Semiconductor memory devices having offset transistors and... Semiconductor memory devices having offset transistors and...

2007-10-16

2007-10-16

Crane, Sara (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S321000

Reexamination Certificate

active

10696615

ABSTRACT:
Semiconductor memory devices are provided that comprise unit memory cells. The unit memory cells include a first planar transistor in a semiconductor substrate, a vertical transistor disposed on the first planar transistor and a second planar transistor in series with the first planar transistor. The first planar transistor and the second planar transistor may have different threshold voltages. The semiconductor memory device may further include word lines. One of these word lines may form the gate of the second planar transistor a unit memory cell.

REFERENCES:
patent: 5604357 (1997-02-01), Hori
patent: 5952692 (1999-09-01), Nakazato et al.
patent: 6169308 (2001-01-01), Sunami et al.
patent: 6211531 (2001-04-01), Nakazato et al.
patent: 6635921 (2003-10-01), Yi et al.

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