Semiconductor memory device with switchable sense amps

Details Semiconductor memory device with switchable sense amps Semiconductor memory device with switchable sense amps

1993-07-23

1994-03-08

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Multiplexing

365205, 36523003, 36523006, 36523009, 365235, 365239, G11C 706

Patent

active

052933326

ABSTRACT:
A semiconductor memory device, in which based on a write and non-write states of a memory transistor, a signal corresponding to a page mode and a normal mode is generated, and a switch circuit activates all sense amplifiers corresponding to memory array blocks and transfers data read out of the memory array blocks to the sense amplifiers in the page mode and also activates one of the sense amplifiers and successively transfers the data read out of the memory cell array blocks to the one activated sense amplifier according to an address signal in the normal mode. A plurality of sense amplifiers are activated in the page mode and the minimum number of the sense amplifiers is activated in the normal mode to eliminate a waste of a consumption power.

REFERENCES:
patent: 4903235 (1990-02-01), Kubuta et al.
patent: 4931994 (1990-06-01), Matsui et al.
patent: 5016226 (1991-05-01), Hiwada et al.
patent: 5220518 (1993-06-01), Haq
patent: 5243574 (1993-09-01), Ikeda

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