Semiconductor memory device with spare memory cell

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment

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365200, 36523006, G11C 2900

Patent

active

061346810

ABSTRACT:
In an SDRAM, when a spare column selection line is not used, access to a column selection line is started at a first time at which complementary column address signals are defined, and access to the column selection line is stopped until a second time at which the level of a redundant column decoder activation signal is defined when the spare column selection line is used. Compared with the case in which access to the column selection line is always stopped until the second time, the access speed is increased.

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