Semiconductor memory device with shortened time period of word l

Details Semiconductor memory device with shortened time period of word l Semiconductor memory device with shortened time period of word l

1985-07-12

1987-11-17

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365233, 365195, G11C 700

Patent

active

047078090

ABSTRACT:
A semiconductor memory device in which the selected word line is energized only during a limited period of time is disclosed. The memory device is equipped with a clock generator which generates a one-shot pulse signal in response to a change in address signal or to an application of a write-enable signal, and the selected word line is energized by the one-shot clock signal. The clock generator further generates a one-shot clock signal in response to a change in an input data signal in a data-write operation. The input data is thereby sorted into the accessed memory cell, even when the data to be stored is supplied a relatively long time after the write-enable signal is applied.

REFERENCES:
patent: 3942162 (1976-03-01), Buchanan
patent: 4272832 (1981-06-01), Ito
patent: 4405996 (1983-09-01), Stewart
Ochii et al. "An Ultralow Power 8K.times.8 Bit Full CMOS RAM with A Six-Transistor Cell", IEEE Journal of Solid State Circuits, vol. SC-17, No. 5, Oct. 1982, pp. 798-803.

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