Semiconductor memory device with selectively connectable...

Details Semiconductor memory device with selectively connectable... Semiconductor memory device with selectively connectable...

2005-10-04

2005-10-04

Phung, Anh (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000, C365S230050

Reexamination Certificate

active

06952363

ABSTRACT:
A semiconductor memory device, that reduces load capacitance of write-only bit lines, may include: a first bit cell array block, in which bit cells thereof are defined by intersections of first bit lines and first word lines, the first bit lines being arranged as pairs of first signal lines and second signal lines, respectively; a second bit cell array block, in which bit cells thereof are defined by intersections of second bit lines and second word lines, the second bit lines being arranged as pairs of third signal lines and the second signal lines; respectively; a block division circuit operable to generate and output block division control signals; and a write bit line divider circuit operable to either open-circuit or connect together the first signal lines and the third signal lines, respectively, according to the block division control signals.

REFERENCES:
patent: 5262992 (1993-11-01), Kondou
patent: 5424995 (1995-06-01), Miyazaki et al.
patent: 5850359 (1998-12-01), Liu
patent: 6366492 (2002-04-01), Kawasumi
patent: 7-114794 (1995-05-01), None
patent: 9-128970 (1997-05-01), None
patent: 2000-222880 (2000-08-01), None

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