Semiconductor memory device with reduced consumption power for b

Details Semiconductor memory device with reduced consumption power for b Semiconductor memory device with reduced consumption power for b

1994-12-28

1997-02-04

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Precharge

3652335, 365233, G11C 702

Patent

active

056006012

ABSTRACT:
A semiconductor memory device is disclosed for use in writing and reading data. The memory device is provided with a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to each of the word lines and bit lines, respectively. The memory device is provided with a precharger which precharges to set the potential of each bit line to a given level before the data on the memory cells can be read out onto the bit lines. The memory device is responsive to an address signal, and a controller for controlling the precharger. The controller activates the precharger so that all the bit lines are precharged when a previously selected word line changes following the change of the address signal.

REFERENCES:
patent: 4922122 (1990-05-01), Dubujet
patent: 4926384 (1990-05-01), Roy
patent: 4932001 (1990-06-01), Chow et al.
patent: 4969125 (1990-11-01), Ciraula et al.
patent: 5222044 (1993-06-01), Tsujimoto
patent: 5365488 (1994-11-01), Matsushita
patent: 5438548 (1995-08-01), Houston

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