Static information storage and retrieval – Read/write circuit – Precharge
Patent
1998-06-17
1999-12-14
Neims, David
Static information storage and retrieval
Read/write circuit
Precharge
36518911, G11C 700
Patent
active
060026243
ABSTRACT:
A semiconductor synchronous dynamic random access memory device has an input/output masking function in a block write mode, plural bit line pairs are concurrently connected to a pair of data lines charged to a power voltage level by a precharge circuit in the input/output masking function so as to prevent memory cells from current flowing out from differential amplifiers, and the precharge circuit has not only p-channel type charging transistors but also n-channel enhancement type charging transistors; even if the bit line pairs are connected to the pair of data lines, the n-channel enhancement type charging transistors supplement the current through the data line pair to the bit line pairs, and prevent potential differences on the bit line pairs from undesirable destruction.
REFERENCES:
patent: 5357474 (1994-10-01), Matano et al.
patent: 5790466 (1998-08-01), Hotta
NEC Corporation
Neims David
Yoha Connie C.
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